Philips Semiconductors
P87LPC778
CMOS single-chip 8-bit microcontroller
Product data Rev. 01 — 31 March 2004 34 of 79
9397 750 12378
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.9 I/O ports
The P87LPC778 has 3 I/O ports, port 0, port 1, and port 2. The exact number of I/O
pins available depend upon the oscillator and reset options chosen. At least 15 pins
of the P87LPC778 may be used as I/Os when a two-pin external oscillator and an
external reset circuit are used. Up to 18 pins may be available if fully on-chip oscillator
and reset configurations are chosen.
All but three I/O port pins on the P87LPC778 may be software configured to one of
four types on a bit-by-bit basis, as shown in Table 3 2. These are: quasi-bidirectional
(standard 80C51 port outputs), push-pull, open drain, and input only. Two
configuration registers for each port choose the output type for each port pin.
8.9.1 Quasi-bidirectional output configuration
The default port output configuration for standard P87LPC778 I/O ports is the
quasi-bidirectional output that is common on the 80C51 and most of its derivatives.
This output type can be used as both an input and output without the need to
reconfigure the port. This is possible because when the port outputs a logic HIGH, it
is weakly driven, allowing an external device to pull the pin LOW. When the pin is
Fig 9. Interrupt sources, interrupt enables, and Power-down wake-up sources.
002aaa627
IE0
EX0
IE1
EX1
BOD
EBO
KBF
EKB
INTERRUPT
TO CPU
WAKE-UP
(IF IN POWER-
DOWN)
EC2
CM2
EWD
WDT
EAD
ADC
EC1
CM1
EA (from IE0 register)
TF0
ET0
TF1
ET1
RI & TI
ES
ATN
EI2
TIMER 1 INTERRUPT
ETI
Table 32: Port output configuration settings
PxM1.y PxM2.y Port output mode
0 0 Quasi-bidirectional
0 1 Push-Pull
1 0 Input Only (High Impedance)
1 1 Open Drain
Philips Semiconductors
P87LPC778
CMOS single-chip 8-bit microcontroller
Product data Rev. 01 — 31 March 2004 35 of 79
9397 750 12378
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
pulled LOW, it is driven strongly and able to sink a fairly large current. These features
are somewhat similar to an open drain output except that there are three pull-up
transistors in the quasi-bidirectional output that serve different purposes.
One of these pull-ups, called the ‘very weak’ pull-up, is turned on whenever the port
latch for the pin contains a logic 1. The very weak pull-up sources a very small current
that will pull the pin HIGH if it is left floating.
A second pull-up, called the ‘weak’ pull-up, is turned on when the port latch for the pin
contains a logic 1 and the pin itself is also at a logic 1 level. This pull-up provides the
primary source current for a quasi-bidirectional pin that is outputting a ‘1’. If a pin that
has a logic 1 on it is pulled LOW by an external device, the weak pull-up turns off, and
only the very weak pull-up remains on. In order to pull the pin LOW under these
conditions, the external device has to sink enough current to overpower the weak
pull-up and take the voltage on the port pin below its input threshold.
The third pull-up is referred to as the ‘strong’ pull-up. This pull-up is used to speed up
low-to-high transitions on a quasi-bidirectional port pin when the port latch changes
from a logic 0 to a logic 1. When this occurs, the strong pull-up turns on for a brief
time, two CPU clocks, in order to pull the port pin HIGH quickly. Then it turns off
again.
The quasi-bidirectional port configuration is shown in Figure 10.
8.9.2 Open drain output configuration
The open drain output configuration turns off all pull-ups and only drives the pulldown
transistor of the port driver when the port latch contains a logic 0. To be used as a
logic output, a port configured in this manner must have an external pull-up, typically
a resistor tied to V
DD
. The pulldown for this mode is the same as for the
quasi-bidirectional mode.
The open drain port configuration is shown in Figure 11.
Fig 10. Quasi-bidirectional output.
002aaa628
2 CPU
CLOCK DELAY
port latch
data
weakstrong
input
data
very
weak
PP P
N
V
DD
port
pin
Philips Semiconductors
P87LPC778
CMOS single-chip 8-bit microcontroller
Product data Rev. 01 — 31 March 2004 36 of 79
9397 750 12378
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.9.3 Push-pull output configuration
The push-pull output configuration has the same pulldown structure as both the open
drain and the quasi-bidirectional output modes, but provides a continuous strong
pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a port output.
The push-pull port configuration is shown in Figure 12.
The three port pins that cannot be configured are P1.2, P1.3, and P1.5. The port pins
P1.2 and P1.3 are permanently configured as open drain outputs. They may be used
as inputs by writing ones to their respective port latches. P1.5 may be used as a
Schmitt trigger input if the P87LPC778 has been configured for an internal reset and
is not using the external reset input function RST.
Additionally, port pins P2.0 and P2.1 are disabled for both input and output if one of
the crystal oscillator options is chosen. Those options are described in Section 8.10
“Oscillator” on page 39.
Fig 11. Open drain output.
002aaa629
port latch
data
input
data
N
port
pin
Fig 12. Push-pull output.
002aaa630
port latch
data
input
data
N
port
pin
P
V
DD

P87LPC778FDH,529

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 8KB OTP 20TSSOP
Lifecycle:
New from this manufacturer.
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