P87LPC778FDH,529 Datasheet P87LPC778FDH,529 | P46-P48

Philips Semiconductors

P87LPC778

CMOS single-chip 8-bit microcontroller

Product data Rev. 01 — 31 March 2004 46 of 79

9397 750 12378

8.14 Timer/counters

The P87LPC778 has two general purpose counter/timers which are upward

compatible with the standard 80C51 Timer0 and Timer1. Both can be conﬁgured to

operate either as timers or event counters (see Tables 43 and 44). An option to

automatically toggle the T0 and/or T1 pins upon timer overﬂow has been added.

In the ‘Timer’ function, the register is incremented every machine cycle. Thus, one

can think of it as counting machine cycles. Since a machine cycle consists of 6 CPU

clock periods, the count rate is

⁄

of the CPU clock frequency. Refer to Section 8.1

“Enhanced CPU” on page 12 for a description of the CPU clock.

In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition

at its corresponding external input pin, T0 or T1. In this function, the external input is

sampled once during every machine cycle. When the samples of the pin state show a

high in one cycle and a low in the next cycle, the count is incremented. The new count

value appears in the register during the cycle following the one in which the transition

was detected. Since it takes 2 machine cycles (12 CPU clocks) to recognize a 1-to-0

transition, the maximum count rate is

⁄

of the CPU clock frequency. There are no

restrictions on the duty cycle of the external input signal, but to ensure that a given

level is sampled at least once before it changes, it should be held for at least one full

machine cycle.

The ‘Timer’ or ‘Counter’ function is selected by control bits C/T in the Special

Function Register TMOD. In addition to the ‘Timer’ or ‘Counter’ selection, Timer0 and

Timer1 have four operating modes, which are selected by bit-pairs (M1, M0) in

TMOD. Modes 0, 1, and 2 are the same for both Timers/Counters. Mode 3 is different.

The four operating modes are described in the following text.

Fig 18. Block diagram showing reset sources.

002aaa636

RPD (UCFG1.6)

RST / V

WDTE (UCFG1.7)

WDT

MODULE

SOFTWARE RESET

SRST

(AUXR1.3)

POWER MONITOR

RESET

Q chip reset

RESET

TIMING

CPU

clock

Philips Semiconductors

P87LPC778

CMOS single-chip 8-bit microcontroller

Product data Rev. 01 — 31 March 2004 47 of 79

9397 750 12378

8.14.1 Mode 0

Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit

Counter with a divide-by-32 prescaler. Figure 19 shows Mode 0 operation.

In this mode, the Timer register is conﬁgured as a 13-bit register. As the count rolls

over from all 1s to all 0s, it sets the Timer interrupt ﬂag TFn. The count input is

enabled to the Timer when TRn = 1 and either GATE = 0 or INTn = 1. (Setting

GATE = 1 allows the Timer to be controlled by external input INTn, to facilitate pulse

width measurements). TRn is a control bit in the Special Function Register TCON

(Tables 46 and 47). The GATE bit is in the TMOD register.

The 13-bit register consists of all 8 bits of THn and the lower 5 bits of TLn. The upper

3 bits of TLn are indeterminate and should be ignored. Setting the run ﬂag (TRn)

does not clear the registers.

Mode 0 operation is the same for Timer0 and Timer1. See Figure 19. There are two

different GATE bits, one for Timer1 (TMOD.7) and one for Timer0 (TMOD.3).

Table 43: TMOD - Timer/counter mode control register (address 89H) bit allocation

Not bit addressable; Reset value: 00H

Bit 7 6 5 4 3 2 1 0

Symbol GATE C/

TM1M0GATEC/TM1M0

Table 44: TMOD - Timer/counter mode control register (address 89H) bit description

Bit Symbol Description

7 GATE Gating control for Timer1. When set, Timer/Counter is enabled

only while the INT1 pin is high and the TR1 control pin is set.

When cleared, Timer1 is enabled when the TR1 control bit is set.

6C/

T Timer or Counter Selector for Timer1. Cleared for Timer operation

(input from internal system clock.) Set for Counter operation (input

from T1 input pin).

5, 4 M1, M0 Mode select for Timer1 (see Tabl e 4 5 below).

3 GATE Gating control for Timer0. When set, Timer/Counter is enabled

only while the

INT0 pin is high and the TR0 control pin is set.

When cleared, Timer0 is enabled when the TR0 control bit is set.

2C/

T Timer or Counter Selector for Timer0. Cleared for Timer operation

(input from internal system clock.) Set for Counter operation (input

from T0 input pin).

1, 0 M1, M0 Mode Select for Timer0 (see Tabl e 4 5 below).

Table 45: M1, M0 timer mode

M1, M0 Timer mode

0 0 8048 Timer ‘TLn’ serves as 5-bit prescaler.

0 1 16-bit Timer/Counter ‘THn’ and ‘TLn’ are cascaded; there is no prescaler.

1 0 8-bit auto-reload Timer/Counter. THn holds a value which is loaded into

TLn when it overﬂows.

1 1 Timer0 is a dual 8-bit Timer/Counter in this mode. TL0 is an 8-bit

Timer/Counter controlled by the standard Timer0 control bits. TH0 is an

8-bit timer only, controlled by the Timer1 control bits (see text). Timer1 in

this mode is stopped.

Philips Semiconductors

P87LPC778

CMOS single-chip 8-bit microcontroller

Product data Rev. 01 — 31 March 2004 48 of 79

9397 750 12378

8.14.2 Mode 1

Mode 1 is the same as Mode 0, except that all 16 bits of the timer register (THn and

TLn) are used. See Figure 20.

8.14.3 Mode 2

Mode 2 conﬁgures the Timer register as an 8-bit Counter (TL1) with automatic reload,

as shown in Figure 21. Overﬂow from TLn not only sets TFn, but also reloads TLn

with the contents of THn, which must be preset by software. The reload leaves THn

unchanged. Mode 2 operation is the same for Timer0 and Timer1.

8.14.4 Mode 3

When Timer1 is in Mode 3 it is stopped. The effect is the same as setting TR1 = 0.

Timer0 in Mode 3 establishes TL0 and TH0 as two separate 8-bit counters. The logic

for Mode 3 on Timer0 is shown in Figure 22. TL0 uses the Timer0 control bits: C/T,

GATE, TR0, INT0, and TF0. TH0 is locked into a timer function (counting machine

cycles) and takes over the use of TR1 and TF1 from Timer1. Thus, TH0 now controls

the ‘Timer1’ interrupt.

Mode 3 is provided for applications that require an extra 8-bit timer. With Timer0 in

Mode 3, an P87LPC778 can look like it has three Timer/Counters. When Timer0 is in

Mode 3, Timer1 can be turned on and off by switching it into and out of its own Mode

3. It can still be used by the serial port as a baud rate generator, or in any application

not requiring an interrupt.

Table 46: TCON - Timer/counter control register (address 88H) bit allocation

Bit addressable; Reset value: 00H

Bit 7 6 5 4 3 2 1 0

Symbol TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

Table 47: TCON - Timer/counter control register (address 88H) bit description

Bit Symbol Description

7 TF1 Timer1 overﬂow ﬂag. Set by hardware on Timer/Counter overﬂow.

Cleared by hardware when the interrupt is processed, or by

software.

6 TR1 Timer1 Run control bit. Set/cleared by software to turn

Timer/Counter 1 on/off.

5 TF0 Timer0 overﬂow ﬂag. Set by hardware on Timer/Counter overﬂow.

Cleared by hardware when the processor vectors to the interrupt

routine, or by software.

4 TR0 Timer0 Run control bit. Set/cleared by software to turn

Timer/Counter 0 on/off.

3 IE1 Interrupt 1 Edge ﬂag. Set by hardware when external interrupt 1

edge is detected. Cleared by hardware when the interrupt is

processed, or by software.

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P87LPC778FDH,529

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IC MCU 8BIT 8KB OTP 20TSSOP

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