Philips Semiconductors
P87LPC778
CMOS single-chip 8-bit microcontroller
Product data Rev. 01 — 31 March 2004 58 of 79
9397 750 12378
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Using the Automatic Address Recognition feature allows a master to selectively
communicate with one or more slaves by invoking the Given slave address or
addresses. All of the slaves may be contacted by using the Broadcast address. Two
special Function Registers are used to define the slave’s address, SADDR, and the
address mask, SADEN. SADEN is used to define which bits in the SADDR are to be
used and which bits are ‘don’t care’. The SADEN mask can be logically ANDed with
the SADDR to create the ‘Given’ address which the master will use for addressing
each of the slaves. Use of the Given address allows multiple slaves to be recognized
while excluding others. The following examples will help to show the versatility of this
scheme:
In the above example SADDR is the same and the SADEN data is used to
differentiate between the two slaves. Slave 0 requires a ‘0’ in bit 0 and it ignores bit 1.
Slave 1 requires a ‘0’ in bit 1 and bit 0 is ignored. A unique address for Slave 0 would
be 1100 0010 since slave 1 requires a ‘0’ in bit 1. A unique address for slave 1 would
be 1100 0001 since a ‘1’ in bit 0 will exclude slave 0. Both slaves can be selected at
the same time by an address which has bit 0 = 0 (for slave 0) and bit 1 = 0 (for
slave 1). Thus, both could be addressed with 1100 0000.
In a more complex system the following could be used to select slaves 1 and 2 while
excluding slave 0:
In the above example the differentiation among the 3 slaves is in the lower 3 address
bits. Slave 0 requires that bit 0 = 0 and it can be uniquely addressed by 1110 0110.
Slave 1 requires that bit 1 = 0 and it can be uniquely addressed by 1110 and 0101.
Slave 2 requires that bit 2 = 0 and its unique address is 1110 0011. To select Slaves 0
and 1 and exclude Slave 2 use address 1110 0100, since it is necessary to make bit
2 = 1 to exclude slave 2. The Broadcast Address for each slave is created by taking
the logical OR of SADDR and SADEN. Zeros in this result are treated as don’t-cares.
In most cases, interpreting the don’t-cares as ones, the broadcast address will be FF
hexadecimal. Upon reset SADDR and SADEN are loaded with 0s. This produces a
given address of all ‘don’t cares’ as well as a Broadcast address of all ‘don’t cares’.
This effectively disables the Automatic Addressing mode and allows the
microcontroller to use standard UART drivers which do not make use of this feature.
Table 53: Slave 0/1 examples
Example 1 Example 2
Slave 0 SADDR = 1100 0000 Slave 1 SADDR = 1100 0000
SADEN = 1111 1101 SADEN = 1111 1110
Given = 1100 00X0 Given = 1100 000X
Table 54: Slave 0/1/2 examples
Example 1 Example 2 Example 3
Slave 0 SADDR = 1100 0000 Slave 1 SADDR = 1110 0000 Slave 2 SADDR = 1110 0000
SADEN = 1111 1001 SADEN = 1111 1010 SADEN = 1111 1100
Given = 1100 0XX0 Given = 1110 0X0X Given = 1110 00XX
Philips Semiconductors
P87LPC778
CMOS single-chip 8-bit microcontroller
Product data Rev. 01 — 31 March 2004 59 of 79
9397 750 12378
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Fig 23. Serial port mode 0.
80C51 internal bus
002aaa641
80C51 internal bus
write to
SBUF
SBUF
ZERO DETECTOR
RxD
P3.0 alt
output
function
TX CONTROL
S
TX CLOCK
START
Q
CL
D
serial port
interrupt
SHIFT
CLOCK
SHIFT
SEND
S6
RXD
P3.0 alt
input
function
load
SBUF
TI
INPUT SHIFT REGISTER
START
RI
RECEIVE
SHIFT
TX CLOCK
RX CONTROL
REN
RI
SBUF
read
SBUF
transmit
TxD
P3.1 alt
output
function
send
RXD (data out)
RXD
(data in)
D0 D1 D5D2 D6D3 D4 D7
TXD (shift clock)
shift
S1 ... S6 S1 ... S6 S1 ... S6 S1 ... S6S1 ... S6S1 ... S6 S1 ... S6 S1 ... S6 S1 ... S6 S1 ... S6S1 ... S6S1 ... S6 S1 ... S6
write to
SBUF
TI
receive
receive
D0 D1 D5D2 D6D3 D4 D7
TxD (shift clock)
shift
WRITE to SCON
(clear RI)
RI
11 11111 0
Philips Semiconductors
P87LPC778
CMOS single-chip 8-bit microcontroller
Product data Rev. 01 — 31 March 2004 60 of 79
9397 750 12378
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Fig 24. Serial port mode 1.
80C51 INTERNAL BUS
SBUF
ZERO DETECTOR
TxD
TX CONTROL
S
TX CLOCK
START
Q
CL
D
serial port
interrupt
SHIFT
SEND
load
SBUF
TI
INPUT SHIFT REGISTER
START
RI
LOAD SBUF
SHIFT
RX
CLOCK
1FFH
RX CONTROL
SBUF
read
SBUF
transmit
RxD
P3.0 alt
input
function
80C51 internal bus
DATA
TB8
÷16
÷16
÷2
timer 1
overflow
SMOD1 = 0 SMOD1
= 1
1-TO-0
TRANSITION
DETECTOR
BIT
DETECTOR
start
bit
stop bit
TX clock
write to
SBUF
send
data
shift
TxD
TI
D0 D1 D5D2 D6D3 D4 D7
receive
RX
clock
shift
RI
bit detector
sample times
start
bit
stop bit
RxD
D0 D1 D5D2 D6D3 D4 D7
write to
SBUF
002aaa642
÷16 reset

P87LPC778FDH,529

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 8KB OTP 20TSSOP
Lifecycle:
New from this manufacturer.
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