PCA9665_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 12 August 2008 55 of 90
NXP Semiconductors
PCA9665
Fm+ parallel bus to I
2
C-bus controller
Table 45. Buffered Mode (MODE = 1)
Control
bits
LB=0 LB=1
AA = 0 Master Transmitter
mode
address/data are
transmitted on a
multiple byte basis
= BC[6:0] value
Master Receiver mode
address is transmitted
and data are received on
a multiple byte basis
= BC[6:0] value
ACK returned after the
last byte of a buffered
sequence received (after
bytes received = BC[6:0]
value)
Master Transmitter mode
address/data are
transmitted on a
multiple byte basis
= BC[6:0] value
Master Receiver mode
address is transmitted
and data are received on
a multiple byte basis
= BC[6:0] value
NACK returned after the
last byte of a buffered
sequence received (after
bytes received = BC[6:0]
value)
Slave Transmitter
mode
NACK returned
after own slave
address received
in addressed
mode, data are
transmitted on a
multiple byte basis
= BC[6:0] value
in addressed
mode, switch to
non addressed
mode after the last
byte of a buffered
sequence is
transmitted (after
bytes sent
= BC[6:0] value)
Slave Receiver mode
NACK returned after own
slave address received
in addressed mode, data
are received on a multiple
byte basis = BC[6:0]
value
in addressed mode, ACK
returned after the last
byte of a buffered
sequence received (after
bytes received = BC[6:0]
value)
in addressed mode,
switch to non-addressed
mode after the last byte of
a buffered sequence is
received (after bytes
received = BC[6:0] value)
Slave Transmitter mode
NACKreturned after
own slave address
received
in addressed mode,
data are transmitted
on a multiple byte
basis = BC[6:0]
value
in addressed mode,
switch to non
addressed mode
after the last byte of
a buffered
sequence is
transmitted (after
bytessent= BC[6:0]
value)
Slave Receiver mode
NACK returned after
own slave address
received
in addressed mode, data
are received on a
multiple byte basis
= BC[6:0] value
in addressed mode,
NACK returned after the
last byte of a buffered
sequence received (after
bytes received = BC[6:0]
value)
in addressed mode,
switch to non-addressed
mode after the last byte
of a buffered sequence
is received (after bytes
received = BC[6:0]
value)
PCA9665_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 12 August 2008 56 of 90
NXP Semiconductors
PCA9665
Fm+ parallel bus to I
2
C-bus controller
AA = 1 Master Transmitter
mode
address/data are
transmitted on a
multiple byte basis
= BC[6:0] value
Master Receiver mode
address is transmitted
and data are received on
a multiple byte basis
= BC[6:0] value
ACK returned after the
last byte of a buffered
sequence received (after
bytes received = BC[6:0]
value)
Master Transmitter mode
address/data are
transmitted on a
multiple byte basis
= BC[6:0] value
Master Receiver mode
address is transmitted
and data are received on
a multiple byte basis
= BC[6:0] value
NACK returned after the
last byte of a buffered
sequence received (after
bytes received = BC[6:0]
value)
Slave Transmitter
mode
ACK returned after
own slave address
received
in addressed
mode, data are
transmitted on a
multiple byte basis
= BC[6:0] value
always addressed
during a buffered
sequence
Slave Receiver mode
ACK returned after own
slave address received
in addressed mode, data
are received on a multiple
byte basis = BC[6:0]
value
in addressed mode, ACK
returned after the last
byte of a buffered
sequence received (after
bytes received = BC[6:0]
value)
Slave Transmitter mode
ACK returned after
own slave address
received
in addressed mode,
data are transmitted
on a multiple byte
basis = BC[6:0]
value
always addressed
during a buffered
sequence
Slave Receiver mode
ACK returned after own
slave address received
in addressed mode, data
are received on a
multiple byte basis
= BC[6:0] value
in addressed mode,
NACK returned after the
last byte of a buffered
sequence received (after
bytes received = BC[6:0]
value)
Table 45. Buffered Mode (MODE = 1)
…continued
Control
bits
LB=0 LB=1
PCA9665_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 12 August 2008 57 of 90
NXP Semiconductors
PCA9665
Fm+ parallel bus to I
2
C-bus controller
8.8 Miscellaneous states
There are four I2CSTA codes that do not correspond to a defined PCA9665 state (see
Table 46). These are discussed in Section 8.8.1 through Section 8.8.4.
8.8.1 I2CSTA = F8h
This status code indicates that the PCA9665 is in an idle state and that no relevant
information is available because the serial interrupt flag, SI, is not yet set. This occurs on a
STOP condition or during a hardware or software reset event and when the PCA9665 is
not involved in a serial transfer.
8.8.2 I2CSTA = 00h
This status code indicates that a bus error has occurred during a serial transfer. A bus
error is caused when a START or STOP condition occurs at an illegal position in the
format frame. Examples of such illegal positions are during the serial transfer of an
address byte, a data byte, or an acknowledge bit. A bus error may also be caused when
external interference disturbs the internal PCA9665 signals. When a bus error occurs, SI
is set. To recover from a bus error, the microcontroller must send an external hardware or
software reset signal to reset the PCA9665.
8.8.3 I2CSTA = 70h
This status code indicates that the SDA line is stuck LOW when the PCA9665, in master
mode, is trying to send a START condition.
Table 46. Miscellaneous states
Status
code
(I2CSTA)
Status of the I
2
C-bus
and the PCA9665
Application software response Next action taken by PCA9665
To/from I2CDAT To I2CCON
STA STO SI AA MODE
F8h On hardware or
software reset or
STOP
No I2CDAT action 1 X 0 X X Go into master mode; send START
No I2CDAT action 0 X 0 0 X No recognition of own slave
address. General Call address will
be recognized if GC = 1.
No I2CDAT action 0 X 0 1 X Will recognize own slave address.
General Call address will be
recognized if GC = 1.
70h Bus error
SDA stuck LOW
No I2CDAT action No I2CCON action Hardware or software reset of the
PCA9665 (requires reset to return
to state F8h)
78h Bus error
SCL stuck LOW
No I2CDAT action No I2CCON action Hardware or software reset of the
PCA9665 (requires reset to return
to state F8h)
FCh Illegal value in
I2CCOUNT
No I2CDAT action No I2CCON action Program a valid value in
I2CCOUNT: BC[6:0] between 1 and
68.
00h Bus error during
master or slave mode,
due to illegal START
or STOP condition
No I2CDAT action No I2CCON action Hardware or software reset of the
PCA9665 (requires reset to return
to state F8h)

PCA9665N,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC CNTRLR PARALLEL/I2C 20-DIP
Lifecycle:
New from this manufacturer.
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