PCA9665_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 12 August 2008 87 of 90
NXP Semiconductors
PCA9665
Fm+ parallel bus to I
2
C-bus controller
18.4 Package related soldering information
[1] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit
board.
[2] For PMFP packages hot bar soldering or manual soldering is suitable.
19. Abbreviations
20. Revision history
Table 56. Suitability of through-hole mount IC packages for dipping and wave soldering
Package Soldering method
Dipping Wave
CPGA, HCPGA - suitable
DBS, DIP, HDIP, RDBS, SDIP, SIL suitable suitable
[1]
PMFP
[2]
- not suitable
Table 57. Abbreviations
Acronym Description
ASIC Application Specific Integrated Circuit
CDM Charged Device Model
CPU Central Processing Unit
DSP Digital Signal Processing
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
I
2
C-bus Inter-Integrated Circuit bus
I/O Input/Output
MM Machine Model
PCB Printed-Circuit Board
RC Resistor-Capacitor network
SMBus System Management Bus
Table 58. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PCA9665_3 20080812 Product data sheet - PCA9665_2
Modifications:
• Table 12 “I2CCON - Control register (A1 = 1, A0 = 1) bit description”, description of STO: second
paragraph re-written
• Section 7.3.2.2 “The Own Address register, I2CADR (indirect address 01h)”:
– deleted (old) 3
rd
sentence and added (new) 3
rd
and 4
th
sentences
– added second “Remark” statement
• Table 24 “I2CMODE - I
2
C-bus Mode register (indirect address 06h) bit description”, description of
AC[1:0]: added reference to
Table 51.
• Section 8.11 “Reset”: added 4 paragraphs following Figure 18, and added (new) Figure 19.
PCA9665_2 20061207 Product data sheet - PCA9665_1
PCA9665_1 20060807 Objective data sheet - -