PCA9665_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 12 August 2008 79 of 90
NXP Semiconductors
PCA9665
Fm+ parallel bus to I
2
C-bus controller
14. Test information
Test data are given in Table 52.
R
L
= load resistance.
C
L
= load capacitance includes jig and probe capacitance.
R
T
= termination resistance should be equal to the output impedance Z
O
of the pulse generators.
Fig 44. Test circuitry for switching times
Table 52. Test data
Test Load S1
C
L
R
L
t
d(DV)
50 pF 500 V
DD
× 2
t
d(QZ)
50 pF 500 open
Test data are given in Table 53.
R
L
= load resistance. R
L
for SDA and SCL > 1 k (3 mA or less current).
C
L
= load capacitance includes jig and probe capacitance.
R
T
= termination resistance should be equal to the output impedance Z
O
of the pulse generators.
Fig 45. Test circuitry for open-drain switching times
Table 53. Test data
Test Load S1
C
L
R
L
t
d(DV)
50 pF 1 k V
DD
t
d(QZ)
50 pF 1 k V
DD
t
as(int)
50 pF 1 k V
DD
t
das(int)
50 pF 1 k V
DD
PULSE
GENERATOR
V
O
C
L
50 pF
R
L
500
002aac694
R
T
V
I
V
DD
DUT
R
L
500
V
DD
× 2
open
V
SS
PULSE
GENERATOR
V
O
C
L
50 pF
R
L
1 k
002aac695
R
T
V
I
V
DD
DUT
V
DD
open
V
SS
PCA9665_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 12 August 2008 80 of 90
NXP Semiconductors
PCA9665
Fm+ parallel bus to I
2
C-bus controller
15. Package outline
Fig 46. Package outline SOT146-1 (DIP20)
UNIT
A
max.
1 2
b
1
cD E e M
H
L
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT146-1
99-12-27
03-02-13
A
min.
A
max.
b
Z
max.
w
M
E
e
1
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
6.40
6.22
3.60
3.05
0.2542.54 7.62
8.25
7.80
10.0
8.3
24.2 0.51 3.2
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
0.25
0.24
0.14
0.12
0.010.1 0.3
0.32
0.31
0.39
0.33
0.0780.17 0.02 0.13
SC-603MS-001
M
H
c
(e )
1
M
E
A
L
seating plane
A
1
w M
b
1
e
D
A
2
Z
20
1
11
10
b
E
pin 1 index
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
(1)
(1) (1)
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
PCA9665_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 12 August 2008 81 of 90
NXP Semiconductors
PCA9665
Fm+ parallel bus to I
2
C-bus controller
Fig 47. Package outline SOT163-1 (SO20)
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(1) (1)
eH
E
LL
p
Q
Z
ywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT163-1
10
20
w M
b
p
detail X
Z
e
11
1
D
y
0.25
075E04 MS-013
pin 1 index
0.1
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.51
0.49
0.30
0.29
0.05
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
0 5 10 mm
scale
X
θ
A
A
1
A
2
H
E
L
p
Q
E
c
L
v M
A
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
99-12-27
03-02-19

PCA9665N,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC CNTRLR PARALLEL/I2C 20-DIP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet