PCA9665N,112 Datasheet PCA9665N,112 | P67-P69

Product data sheet Rev. 03 — 12 August 2008 67 of 90

NXP Semiconductors

PCA9665

Fm+ parallel bus to I

C-bus controller

9.3 Acknowledge

The number of data bytes transferred between the START and the STOP conditions from

transmitter to receiver is not limited. Each byte of eight bits is followed by one

acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,

whereas the master generates an extra acknowledge related clock pulse.

A slave receiver which is addressed must generate an acknowledge after the reception of

each byte. Also a master must generate an acknowledge after the reception of each byte

that has been clocked out of the slave transmitter. The device that acknowledges has to

pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable

LOW during the HIGH period of the acknowledge related clock pulse; set-up and hold

times must be taken into account.

A master receiver must signal an end of data to the transmitter by not generating an

acknowledge on the last byte that has been clocked out of the slave. In this event, the

transmitter must leave the data line HIGH to enable the master to generate a STOP

condition.

Fig 31. System conﬁguration

002aaa966

MASTER

TRANSMITTER/

RECEIVER

SLAVE

RECEIVER

SLAVE

TRANSMITTER/

RECEIVER

MASTER

TRANSMITTER

MASTER

TRANSMITTER/

RECEIVER

SDA

SCL

C-BUS

MULTIPLEXER

SLAVE

Fig 32. Acknowledgement on the I

C-bus

002aaa987

START

condition

9821

clock pulse for

acknowledgement

not acknowledge

acknowledge

data output

by transmitter

data output

by receiver

SCL from master

Product data sheet Rev. 03 — 12 August 2008 68 of 90

NXP Semiconductors

PCA9665

Fm+ parallel bus to I

C-bus controller

10. Application design-in information

10.1 Speciﬁc applications

The PCA9665 is a parallel bus to I

C-bus controller that is designed to allow ‘smart’

devices to interface with I

C-bus or SMBus components, where the ‘smart’ device does

not have an integrated I

C-bus port and the designer does not want to ‘bit-bang’ the

C-bus port. The PCA9665 can also be used to add more I

C-bus ports to ‘smart’

devices, provide a higher frequency, lower voltage migration path for the PCF8584 and

convert 8 bits of parallel data to a serial bus to avoid running multiple traces across the

printed-circuit board.

10.2 Add I

C-bus port

As shown in Figure 34, the PCA9665 converts 8-bits of parallel data into a multiple master

capable I

C-bus port for microcontrollers, microprocessors, custom ASICs, DSPs, etc.,

that need to interface with I

C-bus or SMBus components.

Fig 33. Application diagram using the 80C51

002aab035

PCA9665

80C51

DECODER

D0 to D7

ALE

INT

SCL

SDA

RESET

SLAVE

INT RESET

address bus

SLAVE

Product data sheet Rev. 03 — 12 August 2008 69 of 90

NXP Semiconductors

PCA9665

Fm+ parallel bus to I

C-bus controller

10.3 Add additional I

C-bus ports

The PCA9665 can be used to convert 8-bit parallel data into additional multiple master

capable I

C-bus port as shown in Figure 35. It is used if the microcontroller,

microprocessor, custom ASIC, DSP, etc., already have an I

C-bus port but need one or

more additional I

C-bus ports to interface with more I

C-bus or SMBus components or

components that cannot be located on the same bus (e.g., 100 kHz and 400 kHz slaves

on different buses so that each bus can operate at its maximum potential).

10.4 Convert 8 bits of parallel data into I

C-bus serial data stream

Functioning as a slave transmitter, the PCA9665 can convert 8-bit parallel data into a

two-wire I

C-bus data stream as is shown in Figure 36. This would prevent having to run

8 traces across the entire width of the printed-circuit board.

Fig 34. Adding I

C-bus port application

MICROCONTROLLER,

MICROPROCESSOR,

OR ASIC

control signals

8 bits data

PCA9665

SDA

SCL

002aab036

Fig 35. Adding additional I

C-bus ports application

MICROCONTROLLER,

MICROPROCESSOR,

OR ASIC

control signals

8 bits data

PCA9665

SDA

SCL

002aab037

SDA

SCL

Fig 36. Converting parallel to serial data application

control signals

8 bits data

PCA9665

SDA

SCL

002aab039

MASTER

MICROCONTROLLER,

MICROPROCESSOR,

OR ASIC

PCA9665N,112

Mfr. #:

Buy PCA9665N,112

Manufacturer:

NXP Semiconductors

Description:

IC CNTRLR PARALLEL/I2C 20-DIP

Lifecycle:

New from this manufacturer.

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PCA9665N,112