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SC28L202A1DGG,129

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P77
Philips Semiconductors Product data sheet
SC28L202Dual UART
2005 Nov 01
52
REGISTER MAP
NOTE: The register maps for channels A and B (UARTs A and B) contain some control registers that configure the entire chip.
These are denoted by a ‘•’ symbol
A[6:0]
READ WRITE
EXTENSION
010 0000 (0x20) Mode Register 0 (MR0 A) NEW ADDRESS Mode Register 0 (MR0 A) NEW ADDRESS
010 0001 (0x21) Mode Register 1 (MR1 A) NEW ADDRESS Mode Register 1 (MR1 A) NEW ADDRESS
010 0010 (0x22) Mode Register 2 (MR2 A) NEW ADDRESS Mode Register 2 (MR2 A) NEW ADDRESS
010 0011 (0x23) Mode Register 3 (MR3 A) NEW ADDRESS Mode Register 3 (MR3 A) NEW ADDRESS
010 0100 (0x24) Counter/Timer Clock Source (CTCS 0) Counter/Timer Clock Source (CTCS 0)
010 0101 (0x25) Interrupt Status Register (ISR A) Interrupt Mask Register (IMR A)
010 0110 (0x26) Programmable BRG Preset Lower (PBRGPL 0) Programmable BRG Preset Lower (PBRGPL 0)
010 0111 (0x27) Programmable BRG Preset Upper (PBRGPU 0) Programmable BRG Preset Upper (PBRGPU 0)
010 1000 (0x28) Mode Register 0 (MR0 B) NEW ADDRESS Mode Register 0 (MR0 B) NEW ADDRESS
010 1001 (0x29) Mode Register 1 (MR1 B) NEW ADDRESS Mode Register 1 (MR1 B) NEW ADDRESS
010 1010 (0x2A) Mode Register 2 (MR2 B) NEW ADDRESS Mode Register 2 (MR2 B) NEW ADDRESS
010 1011 (0x2B) Mode Register 3 (MR3 B) NEW ADDRESS Mode Register 3 (MR3 B) NEW ADDRESS
010 1100 (0x2C) Counter/Timer Clock Source (CTCS 1) Counter/Timer Clock Source (CTCS 1)
010 1101 (0x2D) Interrupt Status Register (ISR B) • Interrupt Mask Register (IMR B)
010 1110 (0x2E)
010 1111 (0x2F)
011 0000 (0x30) Receiver Clock Select Register (RxCSR A) Receiver Clock Select Register (RxCSR A)
011 0001 (0x31) Transmitter Clock Select Register (TxCSR A) Transmitter Clock Select Register (TxCSR A)
011 0010 (0x32) Input Port Change Interrupt Enable (IPCE A) Input Port Change Interrupt Enable (IPCE A)
011 0011 (0x33) Programmable BRG Clock Source (PBRGCS) Programmable BRG Clock Source (PBRGCS)
011 0100 (0x34)
011 0101 (0x35)
011 0110 (0x36) Programmable BRG Preset Lower (PBRGPL 1) Programmable BRG Preset Lower (PBRGPL 1)
011 0111 (0x37) Programmable BRG Preset Upper (PBRGPU 1) Programmable BRG Preset Upper (PBRGPU 1)
011 1000 (0x38) Receiver Clock Select Register (RxCSR B) Receiver Clock Select Register (RxCSR B)
011 1001 (0x39) Transmitter Clock Select Register (TxCSR B) Transmitter Clock Select Register (TxCSR B)
011 1010 (0x3A) Input Port Change Interrupt Enable (IPCE B) Input Port Change Interrupt Enable (IPCE B)
011 1011 (0x3B)
011 1100 (0x3C)
011 1101 (0x3D)
011 1110 (0x3E)
011 1111 (0x3F)
Philips Semiconductors Product data sheet
SC28L202Dual UART
2005 Nov 01
53
REGISTER MAP
NOTE: The register maps for channels A and B (UARTs A and B) contain some control registers that configure the entire chip.
These are denoted by a ‘•’ symbol
A[6:0]
READ WRITE
NEW
100 0000 (0x40) System Enable Status (SES A) Watchdog, Character and X Enable(WCXER A)
100 0001 (0x41) Xon Character Register (XonCR A) Xon Character Register (XonCR A)
100 0010 (0x42) Xoff Character Register (XoffCR A) Xoff Character Register (XoffCR A)
100 0011 (0x43) Address Recognition Character (ARCR A) Address Recognition Character (ARCR A)
100 0100 (0x44) Xon/Xoff Interrupt Status Register (XISR A)
100 0101 (0x45) Special Function Register (SFR A) Special Function Register (SFR A)
100 0110 (0x46) Receiver FIFO Interrupt Level (RxFIL A) Receiver FIFO Interrupt Level (RxFIL A)
100 0111 (0x47) Transmitter FIFO Interrupt Level (TxFIL A) Transmitter FIFO Interrupt Level (TxFIL A)
100 1000 (0x48) System Enable Status (SES B) Watchdog, Character and X Enable (WCXER B)
100 1001 (0x49) Xon Character Register (XonCR B) Xon Character Register (XonCR B)
100 1010 (0x4A) Xoff Character Register (XoffCR B) Xoff Character Register (XoffCR B)
100 1011 (0x4B) Address Recognition Character (ARCR B) Address Recognition Character (ARCR B)
100 1100 (0x4C) Xon/Xoff Interrupt Status Register (XISR B)
100 1101 (0x4D) Special Function Register (SFR B) Special Function Register (SFR B)
100 1110 (0x4E) Receiver FIFO Interrupt Level (RxFIL B) Receiver FIFO Interrupt Level (RxFIL B)
100 1111 (0x4F) Transmitter FIFO Interrupt Level (TxFIL B) Transmitter FIFO Interrupt Level (TxFIL B)
101 0000 (0x50) Bidding Control Register – Break Change (BCRBRK A) Bidding Control Register – Break Change (BCRBRK A)
101 0001 (0x51) Bidding Control Register – Change of State (BCRCOS A) Bidding Control Register – Change of State (BCRCOS A)
101 0010 (0x52) Bidding Control Register – Counter/Timer (BCRCT A) Bidding Control Register – Counter/Timer (BCRCT A)
101 0011 (0x53) Bidding Control Register – Xon (BCRx A) Bidding Control Register – Xon (BCRx A)
101 0100 (0x54) Bidding Control Register – Address (BCRA A) Bidding Control Register – Address (BCRA A)
101 0101 (0x55) Bidding Control Register – Loop Back Error (BCRLBE A) Bidding Control Register – Loop Back Error (BCRLBE A)
101 0110 (0x56)
101 0111 (0x57)
101 1000 (0x58) Bidding Control Register – Break Change (BCRBRK B) Bidding Control Register – Break Change (BCRBRK B)
101 1001 (0x59) Bidding Control Register – Change of State (BCRCOS B) Bidding Control Register – Change of State (BCRCOS B)
101 1010 (0x5A) Bidding Control Register – Counter/Timer (BCRCT B) Bidding Control Register – Counter/Timer (BCRCT B)
101 1011 (0x5B) Bidding Control Register – Xon (BCRx B) Bidding Control Register – Xon (BCRx B)
101 1100 (0x5C) Bidding Control Register – Address (BCRA B) Bidding Control Register – Address (BCRA B)
101 1101 (0x5D) Bidding Control Register – Loop Back Error (BCRLBE B) Bidding Control Register – Loop Back Error (BCRLBE B)
101 1110 (0x5E)
101 1111 (0x5F)
Philips Semiconductors Product data sheet
SC28L202Dual UART
2005 Nov 01
54
REGISTER MAP
NOTE: The register maps for channels A and B (UARTs A and B) contain some control registers that configure the entire chip.
These are denoted by a ‘•’ symbol
A[6:0]
READ WRITE
GLOBAL
110 0000 (0x60) • Interrupt Control Register (ICR) • Interrupt Control Register (ICR)
110 0001 (0x61) • Current Interrupt Register (CIR) • Update Current Interrupt Register (UCIR)
110 0010 (0x62)
110 0011 (0x63)
110 0100 (0x64) • Interrupt Vector Register (IVR) • Interrupt Vector Register (IVR)
110 0101 (0x65)
110 0110 (0x66) • Global Chip Configuration Register (GCCR) • Global Chip Configuration Register (GCCR)
110 0111 (0x67) • Test & Revision Register (TRR) • Test & Revision Register (TRR)
110 1000 (0x68)
110 1001 (0x69)
110 1010 (0x6A)
110 1011 (0x6B)
110 1100 (0x6C)
110 1101 (0x6D)
110 1110 (0x6E)
110 1111 (0x6F)
111 0000 (0x70) • Global Interrupt Channel Register (GICR)
111 0001 (0x71) • Global Interrupt Byte Count Register (GIBCR)
111 0010 (0x72) • Global Interrupt Type Register (GITR)
111 0011 (0x73) • Global RxFIFO Register (GRxFIFO) • Global TxFIFO Register (GTxFIFO)
111 0100 (0x74)
111 0101 (0x75)
111 0110 (0x76)
111 0111 (0x77) • Scan Test Control Register (STCR) • Scan Test Control Register (STCR)
111 1000 (0x78)
111 1001 (0x79)
111 1010 (0x7A)
111 1011 (0x7B)
111 1100 (0x7C)
111 1101 (0x7D)
111 1110 (0x7E)
111 1111 (0x7F)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P77

SC28L202A1DGG,129

Mfr. #:
Buy SC28L202A1DGG,129
Manufacturer:
NXP Semiconductors
Description:
UART Interface IC 3-5V 2CH UART 3MBPS
Lifecycle:
New from this manufacturer.
Delivery:
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