Registers addresses STLC5046
22/51 Doc ID 7052 Rev 5
If bit 4 of CONF register (STA)=1
Static I/O mode:
CD3..0 are transferred to the corresponding CS pin if configured as static output (see register
DATA1). For the CS
pins configured as static inputs the corresponding CD3..0 will be written
by the values applied to those pins.
Pin-strap value:
3.1.6 I/O Data register channel #3 (DATA3)
Addr=09h; Reset Value=00h
Addr=0Ah; Reset Value=X0h
Used only if bit 4 of CONF register (STA)=0; Dynamic
I/O mode:
When CS3 is active D11..0 are transferred to the corresponding I/O pins configured as
outputs (see DIR register). For the I/O pins configured as inputs the corresponding D11..0
will be written by the values applied to those pins while CS3
is low.
If bit4 of CONF register (STA)=1
Static I/O mode:
can be used as general purpose R/W registers, without any direct action on the control of
the device.
Pin-strap value:
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
CD
3 CD2 CD1 CD0
00000000
0000
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
D3
7 D36 D35 D34 D33 D32 D31 D30
D311 D310 D39 D38
00000000
0000
