STLC5046 Registers addresses
Doc ID 7052 Rev 5 37/51
3.1.29 Interrupt Mask register for Alarm (AMASK)
Addr=23h; Reset Value=11b
MCF=1: The corresponding alarm bit (CKF) doesn’t generate interrupt.
MCF=0: The corresponding alarm bit (CKF) generates interrupt.
Pin-strap value (value=00h):
3.1.30 Loopback register (LOOPB)
Addr=24h; Reset Value=00h
DL3..0=0: Normal Operation
DL3..0=1: Codec #3..0 is set in Digital Loopback mode, this means that the receive PCM
signal applied to the programmed Receive Time Slot is transferred to the programmed
Transmit Time Slot.
AL3..0=0: Normal Operation
AL3..0=1: Codec #3..0 is set in Analog Loopback mode, this means that the VFRO signal is
transferred to the VFXI input internally into the Codec.
When loopbacks are enabled the signal appears also at the corresponding VFRO output. It
is possible to have no signal on the VFRO output programming the GR register to 00h in
case of digital loopback.
Pin-strap value (value=00h):
3.1.31 Transmit Preamplifier Gain register (TXG)
Addr=25h; Reset Value=X0h
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
MCF
1
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
DL3 DL2 DL1 DL0 AL3 AL2 AL1 AL0
00000000
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
XG3 XG2 XG1 XG0
Registers addresses STLC5046
38/51 Doc ID 7052 Rev 5
XG3..0=0: Transmit preamplifier gain ch. 3..0 = 0dB
XG3..0=1: Transmit preamplifier gain ch. 3..0 = 3.52dB
Overall transmit gain depends on combination of TXG and GTXn registers. For XGn=0 and
GTXn=FF 0dBm0 at DX output correspond to -15dBm|600. (137mVrms) at VFXI input.
Pin-strap value (value=00h):
0000
STLC5046 Registers addresses
Doc ID 7052 Rev 5 39/51
3.1.32 Receive Amplifier Gain registers (RXG-10/32)
Addr: 26h; Reset Value=00h
Addr: 27h; Reset Value=00h
Overall receive gain depends on the receive amplifier gain (Rn2..0 setting in RXG reg.) and
digital gain (GRXn reg. setting).
As a reference: when Rn2..0 is set for 0dB gain and GRXn=FFh (max. gain) 0dBm0 at DR
input correspond to a level at VFRO output equal to 547mVrms (e.g. -3dBm 600ohm)
Pin-strap value:
Overall gain including also GRXn;
GRn = 1: -0.8dB; GRn = 0: -4.3dB.
3.1.33 Silicon Revision Identification Code (SR=D)
Addr: 31h; Read Only.
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
R12 R11 R10 R02 R01 R00
R32 R31 R30 R22 R21 R20
Rn2 Rn1 Rn0 Receive amplifier gain ch#n (dB)
000 Mute
001 -13.98
0 1 0 -7.96
0 1 1 -4.44
1 0 0 -1.94
101 0
110 0
111 0
Rn2 Rn1 Rn0
GRn = 1 1 1 1
GRn = 0 1 0 0
XXXX00 00

STLC5046

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Interface - CODECs Prog 4-Ch CODEC/Filt
Lifecycle:
New from this manufacturer.
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