XR16C864
43
REV. 2.2.0
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
AC ELECTRICAL CHARACTERISTICS
TA=0
O
TO
70
O
C (-40
O
TO
+85
O
C
FOR
INDUSTRIAL
GRADE
PACKAGE
), V
CC
IS
2.97
TO
5.5V
S
YMBOL
P
ARAMETER
L
IMITS
3.3
M
IN
M
AX
L
IMITS
5.0
M
IN
M
AX
U
NIT
C
ONDITIONS
CLK Clock Pulse Duration 20 15 ns
OSC Oscillator Frequency 8 24 MHz
OSC External Clock Frequency 24 32 MHz
T
AS
Address Setup Time (16 Mode) 10 5 ns
T
AH
Address Hold Time (16 Mode) 10 5 ns
T
CS
Chip Select Width (16 Mode) 70 50 ns
T
RD
IOR# Strobe Width (16 Mode) 70 50 ns
T
DY
Read Cycle Delay (16 Mode) 70 50 ns
T
RDV
Data Access Time (16 Mode) 70 50 ns
T
DD
Data Disable Time (16 Mode) 0 25 0 15 ns
T
WR
IOW# Strobe Width (16 Mode) 70 50 ns
T
DY
Write Cycle Delay (16 Mode) 70 50 ns
T
DS
Data Setup Time (16 Mode) 10 5 ns
T
DH
Data Hold Time (16 Mode) 10 5 ns
T
ADS
Address Setup (68 Mode) 10 10 ns
T
ADH
Address Hold (68 Mode) 15 15 ns
T
RWS
R/W# Setup to CS# (68 Mode) 10 5 ns
T
RDA
Read Data Access (68 mode) 70 50 ns
T
RDH
Read Data Hold (68 mode) 15 15 ns
T
WDS
Write Data Setup (68 mode) 20 15 ns
T
WDH
Write Data Hold (68 Mode) 10 10 ns
T
RWH
CS# De-asserted to R/W# De-asserted (68 Mode) 10 10 ns
T
CSL
CS# Strobe Width (68 Mode) 70 50 ns
T
CSD
CS# Cycle Delay (68 Mode) 70 70 ns
T
WDO
Delay From IOW# To Output 50 40 ns 100 pF load
T
MOD
Delay To Set Interrupt From MODEM Input 40 35 ns 100 pF load
T
RSI
Delay To Reset Interrupt From IOR# 40 35 ns 100 pF load
