MT9V032
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21
Table 8. REGISTER DESCRIPTIONS
0X06 (6) VERTICAL BLANKING
2:0
Scan Mode 0 = Progressive scan.
1 = Not valid.
2 = Two−field Interlaced scan. Even−numbered rows are
read first, and followed by odd−numbered rows.
3 = Single−field Interlaced scan. If start address is even
number, only even−numbered rows are read out; if start
address is odd number, only odd−numbered rows are
read out. Effective image size is decreased by half.
0 Y 0, 2, 3 W
3 Sensor Master/Slave
Mode
0 = Slave mode. Initiating exposure and readout is allowed.
1 = Master mode. Sensor generates its own exp
sure and readout timing according to simultaneous/se-
quential mode control bit.
1 Y 0,1 W
4 Sensor Snapshot Mode 0 = Snapshot disabled.
1 = Snapshot mode enabled. The start of frame is triggered
by providing a pulse at EXPOSURE pin. Sensor master/
slave mode should be set to logic 1 to turn on this mode.
0 Y 0,1 W
5 Stereoscopy Mode 0 = Stereoscopy disabled. Sensor is stand−alone and the
PLL generates a 320 MHz (x12) clock.
1 = Stereoscopy enabled. The PLL generates a 480 MHz
(x18) clock.
0 Y 0,1 W
6 Stereoscopic
Master/Slave mode
0 = Stereoscopic master.
1 = Stereoscopic slave. Stereoscopy mode should be en-
abled when using this bit.
0 Y 0,1 W
7 Parallel Output Enable 0 = Disable parallel output. DOUT(9:0) are in High−Z.
1 = Enable parallel output.
1 Y 0,1 W
8 Simultaneous/
Sequential Mode
0 = Sequential mode. Pixel and column readout takes place
only after exposure is complete.
1 = Simultaneous mode. Pixel and column readout takes
place in conjunction with exposure.
1 Y 0,1 W
0X08 (8) SHUTTER WIDTH 1
14:0
Shutter Width 1 The row number in which the first knee occurs. This may be
used only when high dynamic range option (bit 6 of R0x0F)
is enabled and exposure knee point auto adjust control bit is
disabled. This register is not shadowed, but any change
made does not take effect until the following new frame.
1BB
(443)
N 1–32767 W
0X09 (9) SHUTTER WIDTH 2
14:0
Shutter Width 2 The row number in which the second knee occurs. This may
be used only when high dynamic range option (bit 6 of
R0x0F) is enabled and exposure knee point auto adjust
control bit is disabled. This register is not shadowed, but
any change made does not take effect until the following
new frame.
Shutter width 2 = (bits 14:0)
Note:
t
1
= Shutter width 1;
t
2
= Shutter width 2 – Shutter 1;
t
3
= Total integration – Shutter width 2.
1D9
(473)
N 1–32767 W
0X0A (10) SHUTTER WIDTH CONTROL
3:0
T2 Ratio One−half to the power of this value indicates the ratio of
duration time t
2
, when saturation control gate is adjusted to
level V2 to total integration when exposure knee point auto
adjust control bit is enabled. This register is not shadowed,
but any change made does not take effect until the following
new frame.
t
2
= Total integration × (½)
t2_ratio
.
4 N 0–15 W
