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40
GAIN SETTINGS
Changes to Gain Settings
When the digital gain settings (R0x80R0x98) are
changed, the gain is updated on the next frame start.
However, the latency for an analog gain change to take effect
depends on the automatic gain control.
If automatic gain control is enabled (R0xAF, bit 1 is set to
HIGH), the gain changed for frame n first appears in frame
(n + 1); if the automatic gain control is disabled, the gain
changed for frame n first appears in frame (n + 2).
Both analog and digital gain change regardless of whether
the integration time is also changed simultaneously.
New Gain
Programmed
Actual
Gain
Image Data
Frame Start
FRAME_VALID
Gain = 3.5X
Gain = 3.0X
Gain = 3.5X
Gain = 3.0X
Output Image with
Gain = 3.0X
Output
Image with
Gain = 3.5X
Figure 24. Latency of Analog Gain Change When AGC Is Disabled
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Analog Gain
Analog gain is controlled by:
R0x35 global gain
The formula for gain setting is:
Gain + Bits[6 : 0] x 0.0625
(eq. 8)
The analog gain range supported in the MT9V032 is
1X
4X with a step size of 6.25 percent. To control gain
manually with this register, the sensor must NOT be in AGC
mode. When adjusting the luminosity of an image, it is
recommended to alter exposure first and yield to gain
increases only when the exposure value has reached a
maximum limit.
Analog gain + bits (6 : 0) x 0.0625 for values16 * 31
(eq. 9)
Analog gain + bits (6 : 0) ń 2x 0.125 for values 32 * 64
(eq. 10)
For values 16–31: each LSB increases analog gain
0.0625v/v. A value of 16 = 1X gain. Range: 1X to 1.9375X.
For values 32–64: each 2 LSB increases analog gain
0.125v/v (that is, double the gain increase for 2 LSB).
Range: 2X to 4X. Odd values do not result in gain increases;
the gain increases by 0.125 for values 32, 34, 36, and so on.
Digital Gain
Digital gain is controlled by:
R0x99R0xA4 tile coordinates
R0x80R0x98 tiled digital gain and weight
In the MT9V032, the image may be divided into 25 tiles,
as shown in Figure 25, through the twowire serial interface,
and apply digital gain individually to each tile.
X
0/5
X
1/5
X
2/5
X
3/5
X
4/5
X
5/5
Y
0/5
Y
2/5
Y
1/5
Y
3/5
Y
4/5
Y
5/5
Figure 25. Tiled Sample
x0_y0 x1_y0
x4_y0
x0_y1 x1_y1
x4_y1
x0_y2 x1_y2
x4_y2
x0_y3 x1_y3
x4_y3
x0_y4 x1_y4
x4_y4
Registers 0x990x9E and 0x9F0xA4 represent the
coordinates X
0/5
X
5/5
and Y
0/5
Y
5/5
in Figure 25,
respectively.
Digital gains of registers 0x80
0x98 apply to their
corresponding tiles. The MT9V032 supports a digital gain
of 0.253.75X.
The formula for digital gain setting is:
Digital gain + Bits [3 : 0] x 0.25
(eq. 11)
Black Level Calibration
Black level calibration is controlled by:
R0x4C
R0x42
R0x46–R0x48
The MT9V032 has automatic black level calibration
onchip, and if enabled, its result may be used in the offset
correction shown in Figure 26.
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42
Figure 26. Black Level Calibration Flow Chart
Pixel Output
(reset minus signal)
Offset Correction
Voltage (R0x48 or
result of BLC)
Gain Selection
(R0x35 or
result of AGC)
ADC Data
(9:0)
10 (12) bit ADC
C1
C2
+
Σ
×
V
REF
(R0x2C)
The automatic black level calibration measures the
average value of pixels from 2 dark rows (1 dark row if row
bin 4 is enabled) of the chip. (The pixels are averaged as if
they were lightsensitive and passed through the appropriate
gain.)
This row average is then digitally lowpass filtered over
many frames (R0x47, bits 7:5) to remove temporal noise and
random instabilities associated with this measurement.
Then, the new filtered average is compared to a minimum
acceptable level, low threshold, and a maximum acceptable
level, high threshold.
If the average is lower than the minimum acceptable level,
the offset correction voltage is increased by a programmable
offset LSB in R0x4C. (Default step size is 2 LSB Offset =
1 ADC LSB at analog gain = 1X.)
If it is above the maximum level, the offset correction
voltage is decreased by 2 LSB (default).
To avoid oscillation of the black level from below to
above, the region the thresholds should be programmed so
the difference is at least two times the offset DAC step size.
In normal operation, the black level calibration
value/offset correction value is calculated at the beginning
of each frame and can be read through the twowire serial
interface from R0x48. This register is an 8bit signed two’s
complement value.
However, if R0x47, bit 0 is set to “1,” the calibration value
in R0x48 may be manually set to override the automatic
black level calculation result. This feature can be used in
conjunction with the “show dark rows” feature (R0x0D, bit
6) if using an external black level calibration circuit.
The offset correction voltage is generated according to the
following formulas:
Offset Correction Voltage + (8 * bit signed twoȀs complement calibration value, * 127to127) x 0.5mV (eq. 12)
ADC input voltage + (Pixel Output Voltage ) Offset Correction Voltage) x Analog Gain (eq. 13)
Rowwise Noise Correction
Rowwise noise correction is controlled by the following
registers:
R0x70 row noise control
R0x72 row noise constant
R0x73 dark column start
When the rowwise noise cancellation algorithm is
enabled, the average value of the dark columns read out is
used as a correction for the whole row. The rowwise
correction is in addition to the general black level correction
applied to the whole sensor frame and cannot be used to
replace the latter. The dark average is subtracted from each
pixel belonging to the same row, and then a positive constant
is added (R0x72, bits 7:0). This constant should be set to the
dark level targeted by the black level algorithm plus the
noise expected on the measurements of the averaged values
from dark columns; it is meant to prevent clipping from
negative noise fluctuations.
Pixel value + ADC value * dark column average ) row noise constant (eq. 14)
On a perrow basis, the dark column average is calculated
from a programmable number of dark columns (pixels)
values (R0x70, bits 3:0). The default is 10 dark columns. Of
these, the maximum and minimum values are removed and
then the average is calculated. If R0x70, bits 3:0 are set to
“0” (2 pixels), it is essentially equivalent to disabling the
dark average calculation since the average is equal to “0”
after the maximum and minimum values are removed.
R0x73 is used to indicate the starting column address of
dark pixels that the rownoise correction algorithm uses for
calculation. In the MT9V032, dark columns which may be
used are 759–776. R0x73 is used to select the starting
column for the calculation.
One additional note in setting the rownoise correction
register:
777 t (R0x73, bits9 : 0) ) number of dark pixels programmed in R0x70, bits3 : 0 * 1 (eq. 15)

MT9V032C12STMH-GEVB

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ON Semiconductor
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Optical Sensor Development Tools WVGA 1/3" GS CIS HB
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