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MT9V032C12STMH-GEVB

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P61
MT9V032
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GENERAL DESCRIPTION
The ON Semiconductor MT9V032 is a 1/3−inch
wide−VGA format CMOS active−pixel digital image sensor
with global shutter and high dynamic range (HDR)
operation. The sensor has specifically been designed to
support the demanding interior and exterior surveillance
imaging needs, which makes this part ideal for a wide
variety of imaging applications in real−world environments.
This wide−VGA CMOS image sensor features ON
Semiconductor’s breakthrough low−noise CMOS imaging
technology that achieves CCD image quality (based on
signal−to−noise ratio and low−light sensitivity) while
maintaining the inherent size, cost, and integration
advantages of CMOS.
The active imaging pixel array is 752H x 480V. It
incorporates sophisticated camera functions on−chip—such
as binning 2 x 2 and 4 x 4, to improve sensitivity when
operating in smaller resolutions—as well as windowing,
column and row mirroring. It is programmable through a
simple two−wire serial interface.
The MT9V032 can be operated in its default mode or be
programmed for frame size, exposure, gain setting, and
other parameters. The default mode outputs a
wide−VGA−size image at 60 frames per second (fps).
An on−chip analog−to−digital converter (ADC) provides
10 bits per pixel. A 12−bit resolution companded for 10 bits
for small signals can be alternatively enabled, allowing more
accurate digitization for darker areas in the image.
In addition to a traditional, parallel logic output the
MT9V032 also features a serial low−voltage differential
signaling (LVDS) output. The sensor can be operated in a
stereo−camera, and the sensor, designated as a
stereo−master, is able to merge the data from itself and the
stereo−slave sensor into one serial LVDS stream.
Control Register
Timing and Control
Digital Processing
Analog Processing
ADCs
Active−Pixel
Sensor (APS)
Array
752H x 480 V
Slave Video LVDS in
(for stereo applications only)
Serial Video
LVDS Out
Parallel
Video
Data Out
Serial
Register
I/O
Figure 1. Block Diagram
MT9V032
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Figure 2. 48-Pin CLCC Pinout Diagram
123456
44
43
19 20 21 22
23
24 25
26 27
28
29
30
7
8
9
10
11
12
13
14
15
16
17
18
42
41
40
39
38
37
36
35
34
33
32
31
48 47
46 45
LVDSGND
BYPASS_CLKIN_N
LINE_VALID
FRAME_VALID
S
DATA
S_STRL_ADRO
NC
V
AA
STANDBY
S_CTRL_ADR1
VDDLVDS
D
GND
D
OUT
0
BYPASS_CLKIN_P
SER_DATAIN_N
SER_DATAIN_P
LVDSGND
D
GND
V
DD
D
OUT
5
D
OUT
6
D
OUT
7
D
OUT
8
SER_DATAOUT_N
SER_DATAOUT_P
SHFT_CLKOUT_N
SHFT_CLKOUT_P
V
DD
SYSCLK
PIXCLK
D
OUT
1
D
OUT
2
D
OUT
3
D
OUT
4
VAAPIX
A
GND
NC
V
AA
A
GND
RESET#
D
OUT
9
STLN_OUT
EXPOSURE
SCLK
STFRM_OUT
LED_OUT
OE
RSVD
Table 3. PIN DESCRIPTIONS (Only pins DOUT0 through DOUT9 may be tri−stated)
48−Pin LLCC
Numbers
Symbol Type Descriptions Note
29 RSVD Input Connect to DGND. 1
10 SER_DATAIN_N Input
Serial data in for stereoscopy (differential negative). Tie to 1kW pull−
up (to 3.3V) in non−stereoscopy mode.
11 SER_DATAIN_P Input Serial data in for stereoscopy (differential positive). Tie to DGND in
non−stereoscopy mode.
8 BYPASS_CLKIN_N Input
Input bypass shift−CLK (differential negative). Tie to 1KW pull−up (to
3.3V) in non−stereoscopy mode.
9 BYPASS_CLKIN_P Input Input bypass shift−CLK (differential positive). Tie to DGND in non−
stereoscopy mode.
23 EXPOSURE Input Rising edge starts exposure in slave mode.
25 SCLK Input Two−wire serial interface clock. Connect to VDD with 1.5K resistor
even when no other two−wire serial interface peripheral is attached.
28 OE Input DOUT enable pad, active HIGH. 2
30 S_CTRL_ADR0 Input Two−wire serial interface slave address bit 3.
31 S_CTRL_ADR1 Input Two−wire serial interface slave address bit 5.
32 RESET# Input Asynchronous reset. All registers assume defaults.
33 STANDBY Input Shut down sensor operation for power saving.
MT9V032
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6
Table 3. PIN DESCRIPTIONS (Only pins DOUT0 through DOUT9 may be tri−stated)
48−Pin LLCC
Numbers
NoteDescriptionsTypeSymbol
47 SYSCLK Input Master clock (26.6 MHz).
24 SDATA I/O Two−wire serial interface data. Connect to VDD with 1.5K resistor
even when no other two−wire serial interface peripheral is attached.
22 STLN_OUT I/O
Output in master mode—start line sync to drive slave chip in−
phase; input in slave mode.
26 STFRM_OUT I/O
Output in master mode—start frame sync to drive a slave chip in−
phase; input in slave mode.
20 LINE_VALID Output Asserted when DOUT data is valid.
21 FRAME_VALID Output Asserted when DOUT data is valid.
15 DOUT5 Output Parallel pixel data output 5.
16 DOUT6 Output Parallel pixel data output 6.
17 DOUT7 Output Parallel pixel data output 7.
18 DOUT8 Output Parallel pixel data output 8
19 DOUT9 Output Parallel pixel data output 9.
27 LED_OUT Output LED strobe output.
41 DOUT4 Output Parallel pixel data output 4.
42 DOUT3 Output Parallel pixel data output 3.
43 DOUT2 Output Parallel pixel data output 2.
44 DOUT1 Output Parallel pixel data output 1.
45 DOUT0 Output Parallel pixel data output 0.
46 PIXCLK Output Pixel clock out. DOUT is valid on rising edge of this clock.
2 SHFT_CLKOUT_N Output Output shift CLK (differential negative).
3 SHFT_CLKOUT_P Output Output shift CLK (differential positive).
4 SER_DATAOUT_N Output Serial data out (differential negative).
5 SER_DATAOUT_P Output Serial data out (differential positive).
1, 14 VDD Supply Digital power 3.3V.
35, 39 VAA Supply Analog power 3.3V.
40 VAAPIX Supply Pixel power 3.3V.
6 VDDLVDS Supply Dedicated power for LVDS pads.
7, 12 LVDSGND Ground Dedicated GND for LVDS pads.
13, 48 DGND Ground Digital GND.
34, 38 AGND Ground Analog GND.
36, 37 NC NC No connect. 3
1. Pin 29 (RSVD) must be tied to GND
2. Output Enable (OE) tri−states signals D
OUT0–DOUT9. No other signals are tri−stated with OE.
3. No connect. These pins must be left floating for proper operation.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P61

MT9V032C12STMH-GEVB

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Buy MT9V032C12STMH-GEVB
Manufacturer:
ON Semiconductor
Description:
Optical Sensor Development Tools WVGA 1/3" GS CIS HB
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