UJA1069_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 28 October 2009 3 of 64
NXP Semiconductors
UJA1069
LIN fail-safe system basis chip
2.4 Fail-safe features
n Safe and predictable behavior under all conditions
n Programmable fail-safe coded window and time-out watchdog with on-chip oscillator,
guaranteeing autonomous fail-safe system supervision
n Fail-safe coded 16-bit SPI interface for the microcontroller
n Global enable pin for the control of safety-critical hardware
n Detection and detailed reporting of failures:
u On-chip oscillator failure and watchdog alerts
u Battery and voltage regulator undervoltages
u LIN-bus failures (short-circuits)
u TXDL and RXDL clamping situations and short-circuits
u Clamped or open reset line
u SPI message errors
u Overtemperature warning
n Rigorous error handling based on diagnostics
n Supply failure early warning allows critical data to be stored
n 23 bits of access-protected RAM is available e.g. for logging of cyclic problems
n Reporting in a single SPI message; no assembly of multiple SPI frames needed
n Limp-home output signal for activating application hardware in case system enters
Fail-safe mode (e.g. for switching on warning lights)
n Fail-safe coded activation of Software development mode and Flash mode
n Unique SPI readable device type identification
n Software-initiated system reset
3. Ordering information
Table 1. Ordering information
Type number Package
Name Description Version
UJA1069TW HTSSOP32 plastic thermal enhanced thin shrink small outline package; 32 leads;
body width 6.1 mm; lead pitch 0.65 mm; exposed die pad
SOT549-1
UJA1069TW24 HTSSOP24 plastic thermal enhanced thin shrink small outline package; 24 leads;
body width 4.4 mm; lead pitch 0.65 mm; exposed die pad
SOT864-1
