UJA1069_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 28 October 2009 40 of 64
NXP Semiconductors
UJA1069
LIN fail-safe system basis chip
7. Limiting values
[1] Only relevant if V
WAKE
< V
GND
0.3 V; current will flow into pin GND.
[2] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: T
vj
=T
amb
+P
d
× R
th(vj-amb)
, where R
th(vj-amb)
is a fixed value to be used for the calculation of T
vj
. The rating for T
vj
limits the allowable combinations of power dissipation (P
d
) and
ambient temperature (T
amb
).
[3] Human Body Model (HBM): C
HBM
= 100 pF; R
HBM
= 1.5 k.
[4] Only applies for pin BAT42 if C
BAT42
(connected between pin BAT42 and GND) 10 nF; otherwise V
ESD
= ±4 kV for pin BAT42.
[5] ESD performance according to IEC 61000-4-2 (C
IEC
= 150 pF, R
IEC
= 330 ) of pins LIN, RTLIN, WAKE and BAT42 with respect to GND
was verified by an external test house. The following results were obtained:
a) Equal or better than ±4 kV (unaided)
b) Equal or better than ±20 kV for pin LIN (using external ESD protection: NXP Semiconductors PESD1LIN diode).
[6] Machine Model (MM): C
MM
= 200 pF; L
MM
= 0.75 µH; R
MM
=10.
Table 24. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol Parameter Conditions Min Max Unit
V
BAT42
BAT42 supply voltage 0.3 +60 V
load dump; t 500 ms - +60 V
V
BAT14
BAT14 supply voltage V
BAT42
V
BAT14
1V
continuous 0.3 +33 V
load dump; t 500 ms - +45 V
V
DC(n)
DC voltage on pins
V1 0.3 +5.5 V
V3 and SYSINH 1.5 V
BAT42
+ 0.3 V
INH/LIMP 0.3 V
BAT42
+ 0.3 V
SENSE 0.3 V
BAT42
+ 1.2 V
WAKE 1.5 +60 V
LIN and RTLIN with respect to any other pin 60 +60 V
TXDL, RXDL, SDO, SDI, SCK, SCS,
RSTN, INTN and EN
0.3 V
V1
+ 0.3 V
TEST 0.3 +15 V
V
trt
transient voltage at pin LIN in accordance with
ISO 7637-3
150 +100 V
I
WAKE
DC current at pin WAKE
[1]
15 - mA
T
stg
storage temperature 55 +150 °C
T
amb
ambient temperature 40 +125 °C
T
vj
virtual junction temperature
[2]
40 +150 °C
V
ESD
electrostatic discharge voltage HBM
[3]
at pins LIN, RTLIN,
WAKE, BAT42, V3,
SENSE; with respect to
GND
[4][5]
8.0 +8.0 kV
at any other pin 2.0 +2.0 kV
MM; at any pin
[6]
200 +200 V
UJA1069_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 28 October 2009 41 of 64
NXP Semiconductors
UJA1069
LIN fail-safe system basis chip
8. Thermal characteristics
Fig 15. Thermal model of the HTSSOP32 package
Fig 16. Thermal model of the HTSSOP24 package
R
th(c-a)
T
case
(heat sink)
T
amb
001aad671
V1 dissipation V3 dissipation
other dissipation
6 K/W 23 K/W 6 K/W
6 K/W
T
vj
R
th(c-a)
T
case
(heat sink)
T
amb
001aae136
V1 dissipation V3 dissipation
other dissipation
6 K/W 17 K/W 6 K/W
6 K/W
T
vj
UJA1069_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 28 October 2009 42 of 64
NXP Semiconductors
UJA1069
LIN fail-safe system basis chip
9. Static characteristics
Table 25. Static characteristics
T
vj
=
40
°
C to +150
°
C, V
BAT42
=5.5Vto52V;V
BAT14
=5.5Vto27V;V
BAT42
V
BAT14
1 V; unless otherwise specified. All
voltages are defined with respect to ground. Positive currents flow into the IC.
[1]
Symbol Parameter Conditions Min Typ Max Unit
Supply; pin BAT42
I
BAT42
BAT42 supply
current
V1 and V3 off; LIN in Off-line
mode; OTIE = BATFIE = 0;
I
SYSINH
= I
WAKE
= I
RTLIN
=
I
LIN
= 0 mA
V
BAT42
= 8.1 V to 52 V - 50 70 µA
V
BAT42
= 5.5 V to 8.1 V - 70 93 µA
I
BAT42(add)
additional BAT42
supply current
V1 on; I
SYSINH
= 0 mA - 53 76 µA
V3 in Cyclic mode; I
V3
=0mA - 0 1 µA
V3 continuously on;
I
V3
=0mA
-3050µA
T
vj
warning enabled; OTIE = 1 - 20 40 µA
SENSE enabled; BATFIE = 1 - 2 7 µA
LIN in Active mode;
LMC=1;V
TXDL
=V
V1
;
I
RTLIN
=I
LIN
=0mA
- 650 1300 µA
LIN in Active mode; LMC = 1;
V
TXDL
= 0 V (t < t
LIN(dom)(det)
);
I
RTLIN
=I
LIN
=0mA
V
BAT42
= 12 V - 1.5 5 mA
V
BAT42
= 27 V - 3 10 mA
V
POR(BAT42)
BAT42 voltage level
for power-on reset
status bit change
for setting PWONS
PWONS = 0; V
BAT42
falling 4.45 - 5 V
for clearing PWONS
PWONS = 1; V
BAT42
rising 4.75 - 5.5 V
Supply; pin BAT14
I
BAT14
BAT14 supply
current
V1 off; LIN in Off-line mode;
ILEN = 0; I
INH/LIMP
=0mA
-25µA
I
BAT14(add)
additional BAT14
supply current
V1 on; I
V1
= 0 mA - 200 300 µA
V1 on; I
V1
= 0 mA;
V
BAT14
=12V
- 150 200 µA
INH/LIMP enabled; ILEN = 1;
I
INH/LIMP
= 0 mA
-12µA
V
BAT14
BAT14 voltage level for normal output current
capability at V1
9 - 27 V
for high output current
capability at V1
6- 8V

UJA1069TW/5V0/C/T,

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
LIN Transceivers IC LIN FAIL-SAFE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union