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1894K-40LFT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P53
ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 16
ICS1894-40 REV K 022412
Register Map
Register Description
Register Address Register Name Basic / Extended
0 Control Basic
1Status Basic
2,3 PHY Identifier Extended
4 Auto-Negotiation Advertisement Extended
5 Auto-Negotiation Link Partner Ability Extended
6 Auto-Negotiation Expansion Extended
7 Auto-Negotiation Next Page Transmit Extended
8 Auto-Negotiation Next Page Link Partner Ability Extended
9 through 15 Reserved by IEEE Extended
16 through 31 Vendor-Specific (IDT) Registers Extended
Bit Definition When Bit = 0 When Bit = 1 Access
2
SF
2
Default
3
Hex
Register 0 - Control
0.15 Reset No effect Reset mode RW SC 0 3
0.14 Loopback enable Disable Loopback mode Enable Loopback mode RW – 0
0.13 Speed select
1
10 Mbps operation 100 Mbps operation RW – 1
0.12 Auto-Negotiation enable Disable Auto-Negotiation Enable Auto-Negotiation RW – 1
0.11 Low-power mode Normal power mode Low-power mode RW – 0 1
0.10 Isolate No effect Isolate from MII RW – 0
0.9 Auto-Negotiation restart No effect Restart Auto-Negotiation RW SC 0
0.8 Duplex mode Half-duplex operation Full-duplex operation RW – 1
0.7 Collision test No effect Enable collision test RW – 0 0
0.6 IEEE reserved Always 0 N/A RO – 0†
0.5 IEEE reserved Always 0 N/A RO – 0†
0.4 IEEE reserved Always 0 N/A RO – 0†
0.3 IEEE reserved Always 0 N/A RO – 0† 0
0.2 IEEE reserved Always 0 N/A RO – 0†
0.1 IEEE reserved Always 0 N/A RO – 0†
0.0 IEEE reserved Always 0 N/A RO – 0†
ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 17
ICS1894-40 REV K 022412
Register 1 - Control
1.15 100Base-T4 Always 0. (Not
supported.)
N/A RO – 0 7
1.14 100Base-TX full duplex Mode not supported Mode supported CW – 1
1.13 100Base-TX half duplex Mode not supported Mode supported CW – 1
1.12 10Base-T full duplex Mode not supported Mode supported CW – 1
1.11 10Base-T half duplex Mode not supported Mode supported CW – 1 8
1.10 IEEE reserved Always 0 N/A CW – 0†
1.9 IEEE reserved Always 0 N/A CW – 0†
1.8 IEEE reserved Always 0 N/A CW – 0†
1.7 IEEE reserved Always 0 N/A CW – 0† 0
1.6 MF Preamble
suppression
PHY requires MF
Preambles
PHY does not require MF
Preambles
RO – 0
1.5 Auto-Negotiation
complete
Auto-Negotiation is in
process, if enabled
Auto-Negotiation is
completed
RO LH 0
1.4 Remote fault No remote fault detected Remote fault detected RO LH 0
1.3 Auto-Negotiation ability N/A Always 1: PHY has
Auto-Negotiation ability
RO – 1 9
1.2 Link status Link is invalid/down Link is valid/established RO LL 0
1.1 Jabber detect No jabber condition Jabber condition detected RO LH 0
1.0 Extended capability N/A Always 1: PHY has
extended capabilities
RO – 1
Register 2 - PHY Identifier
2.15 OUI bit 3 | c N/A N/A CW – 0 0
2.14 OUI bit 4 | d N/A N/A CW – 0
2.13 OUI bit 5 | e N/A N/A CW – 0
2.12 OUI bit 6 | f N/A N/A CW – 0
2.11 OUI bit 7 | g N/A N/A CW – 0 0
2.10 OUI bit 8 | h N/A N/A CW – 0
2.9 OUI bit 9 | I N/A N/A CW – 0
2.8 OUI bit 10 | j N/A N/A CW – 0
2.7 OUI bit 11 | k N/A N/A CW – 0 1
2.6 OUI bit 12 | l N/A N/A CW – 0
2.5 OUI bit 13 | m N/A N/A CW – 0
2.4 OUI bit 14 | n N/A N/A CW – 1
Bit Definition When Bit = 0 When Bit = 1 Access
2
SF
2
Default
3
Hex
ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 18
ICS1894-40 REV K 022412
2.3 OUI bit 15 | o N/A N/A CW – 0 5
2.2 OUI bit 16 | p N/A N/A CW – 1
2.1 OUI bit 17 | q N/A N/A CW – 0
2.0 OUI bit 18 | r N/A N/A CW – 1
Register 3 - PHY Identifier
3.15 OUI bit 19 | s N/A N/A CW – 1 F
3.14 OUI bit 20 | t N/A N/A CW – 1
3.13 OUI bit 21 | u N/A N/A CW – 1
3.12 OUI bit 22 | v N/A N/A CW – 1
3.11 OUI bit 23 | w N/A N/A CW – 0 4
3.10 OUI bit 24 | x N/A N/A CW – 1
3.9 Manufacturer’s Model
Number bit 5
N/A N/A CW – 0
3.8 Manufacturer’s Model
Number bit 4
N/A N/A CW – 0
3.7 Manufacturer’s Model
Number bit 3
N/A N/A CW – 0 5
3.6 Manufacturer’s Model
Number bit 2
N/A N/A CW – 1
3.5 Manufacturer’s Model
Number bit 1
N/A N/A CW – 0
3.4 Manufacturer’s Model
Number bit 0
N/A N/A CW – 1
3.3 Revision Number bit 3 N/A N/A CW – 0 0
3.2 Revision Number bit 2 N/A N/A CW – 0
3.1 Revision Number bit 1 N/A N/A CW – 0
3.0 Revision Number bit 0 N/A N/A CW – 0
Register 4 -
Auto-Negotiation Advertisement
4.15 Next Page Next page not supported Next page supported R/W – 0 0
4.14 IEEE reserved Always 0 N/A CW – 0†
4.13 Remote fault Locally, no faults
detected
Local fault detected R/W – 0
4.12 IEEE reserved Always 0 N/A CW – 0†
4.11 IEEE reserved Always 0 N/A CW – 0† 1
4.10 IEEE reserved Always 0 N/A CW – 0†
4.9 100Base-T4 Always 0. (Not
supported.)
N/A CW – 0
4.8 100Base-TX, full duplex Do not advertise ability Advertise ability R/W – 1
Bit Definition When Bit = 0 When Bit = 1 Access
2
SF
2
Default
3
Hex
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P53

1894K-40LFT

Mfr. #:
Buy 1894K-40LFT
Manufacturer:
IDT
Description:
Ethernet ICs 3.3V 10/100 PHY RMII
Lifecycle:
New from this manufacturer.
Delivery:
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