SC28L92_7 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 07 — 19 December 2007 2 of 73
NXP Semiconductors
SC28L92
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
2. Features
n Member of IMPACT family: 3.3 V to 5.0 V, −40 °C to +85 °C and 68xxx or 80xxx bus
interface for all devices
n Dual full-duplex independent asynchronous receiver/transmitters
n 16 character FIFOs for each receiver and transmitter
n Pin programming selects 68xxx or 80xxx bus interface
n Programmable data format
u 5 data to 8 data bits plus parity
u Odd, even, no parity or force parity
u 1 stop, 1.5 stop or 2 stop bits programmable in
1
⁄
16
-bit increments
n 16-bit programmable counter/timer
n Programmable baud rate for each receiver and transmitter selectable from:
u 28 fixed rates: 50 kBd to 230.4 kBd
u Other baud rates to 1 MHz at 16×
u Programmable user-defined rates derived from a programmable counter/timer
u External 1× or 16× clock
n Parity, framing, and overrun error detection
n False start bit detection
n Line break detection and generation
n Programmable channel mode
u Normal (full-duplex)
u Automatic echo
u Local loopback
u Remote loopback
u Multi-drop mode (also called wake-up or 9-bit)
n Multi-function 7-bit input port (includes IACKN)
u Can serve as clock or control inputs
u Change of state detection on four inputs
u Inputs have typically > 100 kΩ pull-up resistors
u Change of state detectors for modem control
n Multi-function 8-bit output port
u Individual bit set/reset capability
u Outputs can be programmed to be status/interrupt signals
u FIFO status for DMA interface
n Versatile interrupt system
u Single interrupt output with eight maskable interrupting conditions
u Output port can be configured to provide a total of up to six separate interrupt
outputs that may be wire ORed
u Each FIFO can be programmed for four different interrupt levels
u Watchdog timer for each receiver
n Maximum data transfer rates: 1× - 1 Mbit/s, 16× - 1 Mbit/s
n Automatic wake-up mode for multi-drop applications
n Start-end break interrupt/status
n Detects break which originates in the middle of a character