RF430F5978 System-in-Package

RF430F5978 System-in-Package

Texas Instruments' RF430F5978 System-in-Package adds a 3D low-frequency (LF) wake-up and transponder interface to the CC430 ultra-low-power microcontroller system-on-chip (SoC) with integrated sub-1 GHz RF transceiver. This architecture allows activation and de-activation of the device in a dedicated and well-defined area "on-demand" to achieve extended battery life for the whole system. The embedded LF transponder interface is always functional, even without battery supply, and offers the highest level of security through its 128-bit AES encryption for challenge/response and mutual authentication, and it also adds 2 kB of programmable EEPROM memory to the system.

The CC430 ultra-low-power microcontroller system-on-chip (SoC) combines the CC1101 sub-1 GHz RF transceiver with the powerful MSP430™ 16-bit RISC CPU. The 16-bit registers and constant generators contribute to maximum code efficiency. It features the MSP430 CPUXV2, 32 kB of in-system programmable Flash memory, 4 kB of RAM, two 16-bit timers, a high-performance 12-bit analog-to-digital (A/D) converter with six external inputs plus internal temperature and battery sensors, comparator, universal serial communication interfaces (USCI), 128-bit AES security accelerator, hardware multiplier, DMA, and real-time clock module with alarm capabilities.

Features
  • True System-in-Package based on MSP430 with sub-1 GHz transceiver System-on-Chip (SoC) and additional 3D LF wake up and transponder interface
  • Wide supply voltage range: 3.6 V down to 1.8 V
  • Ultra-low power consumption
    • CPU active mode (AM): 160 µA/MHz
    • Standby mode (LPM3 RTC mode): 2.0 µA
    • Off mode (LPM4 RAM retention): 1.0 µA
    • Radio in receive: 15 mA, 250 kbps, 915 MHz
  • MSP430 system and peripherals
    • 16-bit RISC architecture, extended memory, up to 20 MHz system clock
    • Wake-up from standby mode in less than 6 µs
    • Flexible power management system with SVS and brownout
    • Unified clock system with FLL
    • 16-bit timer TA0, Timer_A with five capture/compare registers
    • 16-bit timer TA1, Timer_A with three capture/compare registers

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