Texas Instruments' LMK61E2 is an ultra-low jitter PLLatinum™ programmable oscillator with a fractional-N frequency synthesizer with integrated VCO that generates commonly used reference clocks. The outputs can be configured as LVPECL, LVDS, or HCSL.

The device features self-startup from on-chip EEPROM that is factory programmed to generate 156.25 MHz LVPECL output. The device registers and EEPROM settings are fully programmable in-system via I²C serial interface. Internal power conditioning provide excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3 V ±5% supply. The device provides fine and coarse frequency margining options via I²C serial interface to support system design verification tests (DVT), such as standard compliance and system timing margin testing.