ADI’s AD9543 is a four input and ten clock output digital phase lock loop (PLL) that reduces timing jitter associated with the external references. The digitally controlled loop and holdover circuitry continuously generate a low jitter output signal, even when all reference inputs fail. The device’s dual DPLL synchronizes 2 kHz to 750 MHz physical layer clocks providing frequency translation with jitter cleaning of noisy references. The AD9543 is available in a 48-lead LFCSP (7 mm × 7 mm) package and operates over the -40°C to +85°C temperature range. This device complies with ITU-T G.8262 and Telcordia GR-253, and supports Telcordia GR-1244, ITU-T G.812, G.813, G.823, G.824, G.825, and G.8273.2. The AD9543 is ideal for base stations and carrier Ethernet.